ATPG Education Flip-flops Fault tolerance Soft Errors Single event upset SEU Calibration Ring oscillators Random access memory Protons Low-power design Power consumption Silicon Software Modeling Soft Error Rate AES Low power DPA Monitoring Delay testing Hardware Design space exploration Core-cell Testability Integrated circuit interconnections Testing DFT Embedded systems Atmospheric neutrons Cross-section SER Failure analysis SEU Delays FPGA Memory device Fault attacks Transistors Heavy ions Accelerometer Computer architecture MRAM Fiabilité Side-Channel Attacks Neutron SoC Test Radiation Multiple cell upset MCU Accelerometers Sensors Heating Variability Logic gates Cross section Diagnostic Logic testing Countermeasures Simulation Field programmable gate arrays CMOS integrated circuits Libraries Through-silicon vias RSA Thermal sensor Single Event Upset Integrated circuit design Cryptography Memory test CMOS Magnetic tunneling Integrated circuit modeling Cryptographie SRAM Neutrons Integrated circuit testing MEMS Analytical models Fault modeling Hardware Trojan Clocks BIST Design VLSI Crosstalk Power demand Robustness Reliability Transient faults Microprocessors Security Memories Automatic test pattern generation Fault injection Electromagnetic Analysis Switches Registers Circuit faults Soft errors